1. Field of the Invention
The invention relates to the field of shadow masking techniques, particularly those employed in MOS processors.
2. Prior Art
In the fabrication of integrated circuits such as metal-oxide-semiconductor (MOS) circuits, a masking pattern is often defined employing photolithographic techniques. This pattern is then used as a mask during subsequent etching of other layers. For example, in the fabrication of field-effect transistors, an oxide layer is commonly formed over a polysilicon layer. A photoresist is then used to define outlines of gates in the oxide layer. Then the oxide layer acts as a mask while the polysilicon layer is etched.
In these processing steps and similar steps, undercutting of the masking members often occurs since, for example, the polysilicon is side-etched or laterally etched and overhangs the polysilicon gate. These overhangs, which are found in masking oxides, silicon nitride layers, photoresist layers, and others, in some cases are useful.
In some processes, the overhangs are used to cast shadows during ion implantation. That is, the regions below the overhangs are masked from the ions by the overhangs. An example of this technique is described in U.S. Pat. No. 3,823,352, Column 4 beginning at line 32. Other patents describing use of overhangs and undercutting are U.S. Pat. Nos. 3,761,785; 3,851,379; 3,961,999; and 4,060,427. For the most part, these patents describe complicated processes, and particularly where overhangs are employed to completely block the implantation of impurities into underlying regions. This is most often done to obtain alignment with one or more circuit members.
With the presently described process, overhangs are used to only partially block the implantation of an impurity into the substrate. A substantial advantage is obtained with this technique since precise alignment with a gate results, as will be described.